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83 Cards in this Set
- Front
- Back
Speed
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Most important in differentiating primary and secondary storage
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Access time
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time required to perform one complete read or write operation
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Average access time
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when access time varies with storage location the average is of all location access times
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Block
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generic term for describing secondary storage data transfer units
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data transfer rate
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dividing 1 by the access time in seconds and multiplying the result by the unit of data transfer
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non volatile storage
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holds data without loss over long periods
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volatile storage
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cant hold data reliably for long periods
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serial access
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storage devices stores and retrieves data items in a linear, or sequential, order ie vhs
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random access or direct access
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isnt restricted to any specific order when accessing data
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parallel access
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access multiple storage locations simultaneously
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portability
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entire storage devices can be transported between computer systems or the storage medium can be removed from the storage devices and transported to a compatible storage medium on another computer
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cost
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speed, volatility, access method, portability, and capacity change this
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random access memory
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primary storage with microchip implementation with semi conductors, capability to read and write with equal speed, random access to stored bytes, words, or larger data units
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Static Ram (SRAM)
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entirely transitiors, require continuous supply of electrical power to maintain positions
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dynamic ram (DRAM)
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each bit has a transistor and capacitor, refresh automatically, cant refresh at the same time as read write
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refresh cycle
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when dram performs a refresh operation
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synchronous dram (SDRAM)
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read ahead ram that uses same clock pulse as the system bus
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double data rate (DDR)
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supports clock rate up to 1 GHz and reads or writes eight 64-bit words per clock cycle
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nonvolatile memory (NVM)
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forms of RAM with long-term or permanent data retention
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firmware
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software stored on nvm
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read-only memory (ROM)
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earliest type of nvm
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erasable programmable ROM (EPROM)
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manufactured blank, writeen with a special EPROM writer, and erased by exposure to uv light
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electronically erasable programmable ROM (EEPROM)
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can be programmed,erased, and reprogrammed by signals sent from a cpu
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flash RAM
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most common nvm, similar to DRAM in capacity and read performance, but lacks write performance. each write degrades the storage cell
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magnetoresistive RAM (MRAM)
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stores bit values by using two magnetic elements, one with fixed polarity and the other with polarity that changes when a bit is written. comparable read and write with SRAM and densitites comparable to DRAM, does not degrade like flash ram
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phase change memory (PCM)
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uses glass like compound of germanium antimony and tellurium. switches at certain heat from amorphous to crystalline and gives off different reflectivity
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read/write head
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what the wire is coiled around
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magnetic storage
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uses read/write head to generate magnetic field that is stored on a magnetic storage medium
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magnetic disk
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flat circular platters with metallic coatings that are rotated beneath read/write heads
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track
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one concentric circle of a platter/ surface area under a read/write head when its position is fixed
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cylinder
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all the tracks at a equivalent distance from the edge or spindle on all platter surfaces
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access arm
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where the read/write head is mounted
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hard disk
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magnetic disk medium with a rigid metal base
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drive array
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multiple hard disks in a single storage cabinet
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Solid state drive
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mimics a magnetic disk drives behavior but uses flash ram or other nvm devices as the storage medium and read write mechanism
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optical mass storage
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tightly focused lasers that can access a very small storage medium area, bits are stored by variations in light reflection of the medium
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bus
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shared electrical or optical channel that connects two or more devices
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peripheral devices
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reference to all i/o, storage devices
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data bus
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transmits data between computer system components
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address bus
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transmits a memory address when primary storage is the sending or receiving device
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control bus
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carries commands, command responses, status codes, and similar messages
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bus protocol
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governs the format content and timing of data memory addresses and control messages sent across the bus
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bus master
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cpu is the focus of all computer activity and takes this role
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bus slaves
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everything else not the master
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direct memory access DMA
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assumes role of bus master for all transfers between memory and other storage or i/o devices
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peer to peer bus
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any device can assume control of the bus or act as a bus master for transfers to any other device
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memory bus
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connects only the cpu and memory, higher data transfer rate than the system bus becous of shorter length
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video bus
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connects only memory and video interface
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storage bus
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connects secondary storage devices to the system bus
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external i/o bus
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connects one or more external devices to the system bus
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logical access
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read or write operation from a storage devices
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linear address space
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set of sequentially numbered storage locations
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device controller
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implement the bus interface and access protocols. translate logical accesses into physical accesses. enable serveral devices to share access to a bus connection
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i/o channel. channel
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varies from device controller in number of devices that can be controlled, variability in type and capability of attached devices. maximum communication capacity
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interrupt handlers
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os service routine to process each possible interrupt
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supervisor
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master interrupt handler program, examines interrupt code stored in the interrupt register and uses it as an index to the interrupt table
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multiple interrupts
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grouping and prioritizing when there are more than one interrupt and the cpu is busy
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stack
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mechanism that enable a program to rsume execution in exactly the same state as before an interruption is called (LIFO)
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push
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added to the stack
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pop
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adding back to the correct register
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stack overflow
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a push to a full stack
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stack pointer
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special purpose register always points to the next empty address
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buffers
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small storage areas that hold data in transit from one device to another
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buffer overflow
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buffer isnt large enough to hold a full page
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cache
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like a buffer but only used for storage device accesses larger than buffer normally
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video controllers
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enables communication between computer system and monitor, generates analog or digital video signals
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communication protocols
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rules for message and transmission
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message
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data and command content
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encoding and transmitting
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data bits can be encoded into analog or digital signals
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carrier waves
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sine wave with encoded bits
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phase
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waves cycle
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analog signals
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uses full range of carrier wave characteristics to encode continuous data values, can represent any data value within a continuum of values
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digital signals
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can contain one of a finite number of possible values
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square wave
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contains abrupt amplitude shifts between two different values
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voltage ranges
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binary signaling method using voltage ranges
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signal capacity and errors
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analog signals compared to digital are susceptible to transmission error but carry more information
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transmission media
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communication path that transports signals
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frequency
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basic measure of data-carrying capacity
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bandwidth
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difference between max and min frequencies of a signal
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electrical cabling types
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twisted pair limited bandwidth, axial offeres higher bandwidth
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optical cabling
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high bandwidth, little internally generated noise and distortion, requires amplifiers and repeaters
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parallel transmission
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uses a separate transmission line for each bit position
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serial transmission
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uses a single line to send one bit at a time, more reliable over much longer distances
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